1. Field of the Invention
The present invention relates to data processing. More particularly, the present invention relates to debugging of a data processing apparatus.
2. Description of the Prior Art
It is known to perform debugging of a data processing apparatus in order to determine defects in operation of data processing hardware and/or software. As processors become more complex with more data processing elements on a single data processing integrated circuit, perhaps including multiple processors configurable to run multiple operating systems, the process of debugging is becoming more complex and challenging. However, debugging is an important phase in software and system design to identify and eliminate defects.
It is also known to provide a data processing apparatus capable of operating at a plurality of processor operating states where the processing circuitry imposes on program instructions different access permissions to at least one of a memory and set of registers at the different privilege levels. For example, a user mode could be provided at which program instructions have access permissions to a subset of control registers and a system mode could be provided where the program instructions have access permission to a larger subset of control registers. It is important that operation of the data processing apparatus in all of the possible modes should be thoroughly debugged.
It is known in the ARM v7 processor architecture to provide a special debug mode, which the processor enters to process a debug event, such as a breakpoint or watchpoint match. When in this debug mode the processor reads instructions from an instruction transfer register, which is controlled by a debugger connected to the data processing apparatus via a debug port. Depending on the choice of instruction, the debugger is able to view and modify the contents of the processor registers and view and modify the contents of memories connected to the processor. Thus the debugger is able to effectively debug software programs and diagnose other defects such as defects in the design of the data processing apparatus itself.
Accordingly, there is a requirement to provide a more efficient way of causing the data processing apparatus to transition between different operating states.